The present invention is directed to a method for manufacturing complementary metal oxide semiconductor (CMOS) transistors, and more particularly for manufacturing high voltage CMOS transistors of an integrated circuit, which includes NMOS (N type metal oxide semiconductor) and PMOS (P type metal oxide semiconductor) devices.
In the present state of art, methods for manufacturing CMOS transistors of an integrated circuit include a process of forming a poly silicon gate electrode layer. Such a structure has a high breakdown voltage. However, this process has the shortcoming of a long cycle time, i.e. the manufacturing time for a cycle is long, so that manufacturing cost is raised by such a long cycle time. Moreover, CMOS transistors made by conventional methods have a serious latch-up problem, which is fatal to the operation of the entire circuit which uses such transistors.